Items where Author is "Marino, MD"

Article

Zhang, Q and Wu, H and Mei, X and Han, D and Marino, MD and Li, K-C and Guo, S (2023) A Sparse Sensor Placement Strategy based on Information Entropy and Data Reconstruction for Ocean Monitoring. IEEE Internet of Things Journal. pp. 1-14. ISSN 2327-4662 DOI: https://doi.org/10.1109/jiot.2023.3281831

Long, J and Liang, W and Li, K-C and Wei, Y and Marino, MD (2022) A Regularized Cross-Layer Ladder Network for Intrusion Detection in Industrial Internet-of-Things. IEEE Transactions on Industrial Informatics. ISSN 1551-3203 DOI: https://doi.org/10.1109/tii.2022.3204034

Han, D and Liu, M and Weng, TH and Tang, C and Marino, MD and Li, KC (2022) A novel secure DV-Hop localization algorithm against wormhole attacks. Telecommunication Systems, 80. pp. 413-430. ISSN 1018-4864 DOI: https://doi.org/10.1007/s11235-022-00914-1

Zhang, T and Han, D and Marino, MD and Wang, L and Li, K-C (2021) An Evolutionary-Based Approach for Low-Complexity Intrusion Detection in Wireless Sensor Networks. Wireless Personal Communications. ISSN 0929-6212 DOI: https://doi.org/10.1007/s11277-021-08757-w

Fan, W and Zhang, H and Li, KC and Zhang, S and Marino, MD and Jiang, H (2018) An efficient algorithm for modelling and dynamic prediction of network traffic. International Journal of Computational Science and Engineering, 16 (3). pp. 311-320. ISSN 1742-7185 DOI: https://doi.org/10.1504/IJCSE.2018.091779

Marino, MD (2018) Architectural Impacts of RFiop: RF to Address I/O Pad and Memory Controller Scalability. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. ISSN 1063-8210 DOI: https://doi.org/10.1109/TVLSI.2018.2821004

Marino, MD (2018) RAMON: Region Aware Memory Controller. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26 (4). pp. 697-710. ISSN 1063-8210 DOI: https://doi.org/10.1109/TVLSI.2018.2789520

Marino, MD and Weng, TH and Li, KC (2017) Exploiting Dynamic Transaction Queue Size in Scalable Memory Systems. Soft Computing. ISSN 1432-7643 DOI: https://doi.org/10.1007/s00500-016-2470-x

Marino, MD and Li, KC (2016) System Implications of LLC MSHRs in Scalable Memory Systems. Microprocessors and Microsystems, 52. pp. 355-364. ISSN 0141-9331 DOI: https://doi.org/10.1016/j.micpro.2016.12.007

Marino, MD (2016) ABaT-FS: Towards adjustable bandwidth and temperature via frequency scaling in scalable memory systems. MICROPROCESSORS AND MICROSYSTEMS, 45. pp. 339-354. ISSN 0141-9331 DOI: https://doi.org/10.1016/j.micpro.2016.06.013

Marino, MD and Li, KC (2016) Last Level Cache Size Heterogeneity in Embedded Systems. Journal of Supercomputing, 72 (2). pp. 503-544. ISSN 1573-0484 DOI: https://doi.org/10.1007/s11227-015-1576-8

Marino, MD and Li, KC (2016) Last level cache size heterogeneity in embedded systems. Journal of Supercomputing, 72 (2). 503 - 544. ISSN 0920-8542 DOI: https://doi.org/10.1007/s11227-015-1576-8

Marino, MD and Li, KC (2015) Reducing Memory Controller Transaction Queue Size in Scalable Memory Systems. The 2015 World Congress on Information Technology Applications and Services: Advanced Mobile, Communications, Security, Multimedia, Vehicular, Cloud, IoT, and Computing.

Marino, MD and Li, KC (2015) Implications of Shallower Memory Controller Transaction Queues in Scalable Memory Systems. Journal of Supercomputing. ISSN 1573-0484 DOI: https://doi.org/10.1007/s11227-015-1485-x

Marino, MD and Li, KC (2014) Insights on Memory Controller Scaling for Multicore Embedded Systems. International Journal on Embedded Systems, 6 (4). ISSN 1741-1068 DOI: https://doi.org/10.1504/IJES.2014.065000

Book Section

Marino, MD (2013) "RFiof: An RF Approach to I/O-pin and Memory Controller Scalability for Off-chip Memories." In: Proceedings of the ACM International Conference on Computing. UNSPECIFIED. ISBN 978-1-4503-2053-5 DOI: https://doi.org/10.1145/2482767.2482803

Gebhart, M and Maher, B and Koons, C and Diammond, J and Grattz, P and Marino, MD and Ranganathan, N and Behnam, R and Smith, A and Burril, J and Keckler, S and Burger, D and McKinley, K (2009) "An evaluation of the TRIPS computer system." In: Proceedings of the 14th international conference on Architectural support for programming languages and operating systems. Association for Computing Machinery, 1 - 12. ISBN 978-1-60558-406-5 DOI: https://doi.org/10.1145/1508244.1508246